Some known power supply circuits (e.g., a direct current (DC)-to-DC converter such as a hysteretic buck converter) can be gradually activated using a soft-start process implemented using a soft-start circuit and a gradually ramped reference voltage. The power supply circuit can be gradually activated to reduce, for example, in-rush currents, voltage spikes, and so forth, that can damage the power supply circuit and/or a load circuit coupled to the power supply circuit.
Due to limitations in device technology and/or the input voltage range of error comparators included in known power supply circuits, the undesirable effects of instantaneously activating a power supply circuit (rather than using a soft-start process) may not be avoided. For example, low values of feedback voltage and/or low values of a ramped reference voltage when used with error comparators that are not configured to handle such low voltages can cause surge currents and output voltage overshoot even during a soft-start process. Although some known folded-cascode topologies that can handle low voltages can be used as error comparators, these folded-cascode topologies consume an undesirable level of power, space, and/or do not have the desired gains that are appropriate for certain high-speed applications.
In some known power supply circuits, the current/voltage spikes during a soft-start process can be close to, or even more than, the current/voltage limits of the power supply circuit and/or a load circuit coupled thereto. These relatively high currents/voltage can lead to reliability and/or malfunction issues in some applications. In some instances, output voltage overshoot can cause an under-voltage lock-out (UVLO) circuit in a load device to be erroneously triggered. Thus, a need exists for systems, methods, and apparatus to address the shortfalls of present technology and to provide other new and innovative features.